• DocumentCode
    780414
  • Title

    A scenario-matching approach to the description and model checking of real-time properties

  • Author

    Braberman, Victor ; Kicillof, Nicolas ; Olivero, Alfredo

  • Author_Institution
    Comput. Sci. Dept., Buenos Aires Univ., Argentina
  • Volume
    31
  • Issue
    12
  • fYear
    2005
  • Firstpage
    1028
  • Lastpage
    1041
  • Abstract
    A major obstacle in the technology transfer agenda of behavioral analysis and design methods is the need for logics or automata to express properties for control-intensive systems. Interaction-modeling notations may offer a replacement or a complement, with a practitioner-appealing and lightweight flavor, due partly to the sub specification of intended behavior by means of scenarios. We propose a novel approach consisting of engineering a new formal notation of this sort based on a simple compact declarative semantics: VTS (visual timed event scenarios). Scenarios represent event patterns, graphically depicting conditions over traces. They predicate general system events and provide features to describe complex properties not expressible with MSC-like notations. The underlying formalism supports partial orders and real-time constraints. The problem of checking whether a timed-automaton model has a matching trace is proven decidable. On top of this kernel, we introduce a notation to state properties over all system traces: conditional scenarios, allowing engineers to describe uniquely rich connections between antecedent and consequent portions of the scenario. An undecidability result is presented for the general case of the model-checking problem over dense-time domains, to later identify a decidable-yet practically relevant-subclass, where verification is solvable by generating antiscenarios expressed in the VTS-kernel notation.
  • Keywords
    automata theory; formal specification; formal verification; real-time systems; behavioral analysis; control-intensive system; design methods; event patterns; formal verification; interaction-modeling; model checking; real-time constraints; scenario-matching approach; timed-automaton model; visual timed event scenarios; Automata; Automatic control; Computer industry; Control system synthesis; Control systems; Design methodology; Electrical equipment industry; Kernel; Logic design; Real time systems; Index Terms- Requirements/specifications; formal methods; model checking; scenario-based verification.;
  • fLanguage
    English
  • Journal_Title
    Software Engineering, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-5589
  • Type

    jour

  • DOI
    10.1109/TSE.2005.131
  • Filename
    1566605