DocumentCode :
780783
Title :
On-chip crosstalk mitigation for densely packed differential striplines using via fence enclosures
Author :
Guckenberger, D. ; Schuster, C. ; Kwark, Y. ; Kornegay, K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
Volume :
41
Issue :
7
fYear :
2005
fDate :
3/31/2005 12:00:00 AM
Firstpage :
412
Lastpage :
414
Abstract :
The measured crosstalk characteristics for close-packed via fence enclosed differential stripline structures in a standard digital CMOS process are reported. The transmission lines achieve a packing pitch of 16 μm of interconnect width per differential pair. The nearest neighbour far-end differential crosstalk is measured to be better than -43 dB and the near-end differential crosstalk is better than -37 dB below the drive signal at frequencies up to 20 GHz for 600 μm lines. This is sufficient for use in high-density, high-speed analogue and digital integrated circuits.
Keywords :
CMOS digital integrated circuits; analogue integrated circuits; crosstalk; digital integrated circuits; high-speed integrated circuits; integrated circuit interconnections; strip lines; densely packed differential striplines; digital CMOS process; high-density high-speed analogue integrated circuits; high-density high-speed digital integrated circuits; near-end differential crosstalk; nearest neighbour far-end differential crosstalk; on-chip crosstalk mitigation; via fence enclosures;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20058423
Filename :
1421233
Link To Document :
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