A Novel Multiple-Gate Polycrystalline Silicon Nanowire Transistor Featuring an Inverse-T Gate

Author

Lin, Horng Chih ; Hsu, Hsing Hui ; Su, Chun Jung ; Huang, Tiao Yuan

Author_Institution

Dept. of Electron. Eng. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu

Volume

29

Issue

7

fYear

2008

fDate

7/1/2008 12:00:00 AM

Firstpage

718

Lastpage

720

Abstract

A novel multiple-gate field-effect transistor with poly-Si nanowire (NW) channels is proposed and fabricated using a simple process flow. In the proposed structure, poly-Si NW channels are formed with sidewall spacer etching technique, and are surrounded by an inverse-T gate and a top gate. When the two gates are connected together to drive the NW channels, dramatic performance enhancement as compared with the cases of single- gate operation is observed. Moreover, subthreshold swing as low as 103 mV/dec at Vd = 2 V is recorded. Function of using the top gate bias to modulate the threshold voltage of device operation driven by the inverse-T gate biases is also investigated in this letter.

Keywords

elemental semiconductors; etching; field effect transistors; nanowires; silicon; Si; inverse-T gate; multiple-gate field-effect transistor; multiple-gate polycrystalline silicon nanowire transistor; sidewall spacer etching technique; threshold voltage; Controllability; Crystallization; Etching; FETs; Fabrication; Lithography; Nanoscale devices; Silicon; Threshold voltage; Transistors; Field-effect transistor; multiple gate (MG); nanowire (NW); poly-Si;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2008.2000654

Filename

4558101