Title :
Ultrahigh Capacitance Density for Multiple ALD-Grown MIM Capacitor Stacks in 3-D Silicon
Author :
Klootwijk, J.H. ; Jinesh, K.B. ; Dekkers, W. ; Verhoeven, J.F. ; van den Heuvel, F.C. ; Kim, H.-D. ; Blin, D. ; Verheijen, M.A. ; Weemaes, R.G.R. ; Kaiser, M. ; Ruigrok, J. J M ; Roozeboom, F.
Author_Institution :
Philips Res. Labs., Eindhoven
fDate :
7/1/2008 12:00:00 AM
Abstract :
ldquoTrenchrdquo capacitors containing multiple metal-insulator-metal (MIM) layer stacks are realized by atomic-layer deposition (ALD), yielding an ultrahigh capacitance density of 440 at a breakdown voltage VDB > 6 V. This capacitance density on silicon is at least 10times higher than the values reported by other research groups. On a silicon substrate containing high-aspect-ratio macropore arrays, alternating MIM layer stacks comprising high-k Al2O3dielectrics and TiN electrodes are deposited using optimized ALD processing such that the conductivity of the TiN layers is not attacked. Ozone annealing subsequent to each Al2O3 deposition step yields significant improvement of the dielectric isolation and breakdown properties.
Keywords :
MIM devices; atomic layer deposition; sputter etching; 3D silicon; metal-insulator-metal layer stacks; multiple ALD-grown MIM capacitor stacks; ultra high capacitance density; Annealing; Atomic layer deposition; Capacitance; Conductivity; Dielectric substrates; Electrodes; MIM capacitors; Metal-insulator structures; Silicon; Tin; 3D silicon; Atomic-layer deposition (ALD); Fowler–Nordheim (FN) tunneling; deep reactive ion etching (DRIE); equivalent series inductance (ESL); equivalent series resistance (ESR); high- $k$ dielectrics; high-density capacitors; low pressure chemical vapor deposition (LPCVD); macropore arrays; metal-insulator-metal (MIM); reactive ion etching (RIE); silicon devices;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2008.923205
