• DocumentCode
    781400
  • Title

    A novel CORDIC-based array architecture for the multidimensional discrete Hartley transform

  • Author

    Guo, Jiun-In ; Liu, Chi-Min ; Jen, Chein-Wei

  • Author_Institution
    Comput. & Commun. Res. Labs., Ind. Technol. Res. Inst., Hsinchu, Taiwan
  • Volume
    42
  • Issue
    5
  • fYear
    1995
  • fDate
    5/1/1995 12:00:00 AM
  • Firstpage
    349
  • Lastpage
    355
  • Abstract
    In this paper, a coordinate rotation digital computer (CORDIC)-based array architecture is presented for computing the multidimensional (M-D) discrete Hartley transform (DHT). Since the kernel of the M-D DHT is inseparable, the M-D DHT problems cannot be computed through the 1-D DHT´s directly. Bracewell et al. have presented an algorithm for the M-D DHT through the 1-D DHT´s. The existing hardware architectures have been designed using this algorithm. However, the postprocessing required in the algorithm leads to high hardware overhead. This paper presents a new algorithm to compute M-D DHT through a special 1-D transform which is derived through considering both the separable computation and the efficient implementation with CORDIC architectures. This algorithm provides a direct way to compute the M-D DHT separably through 1-D transforms with simpler postprocessing than that in Bracewell´s approach. Also, the algorithm exploits the symmetry of the triangular functions to reduce the computational complexity. Using this algorithm, we design an array architecture for the M-D DHT. This architecture features a systolic computing style, PE´s with a CORDIC structure, low I/O cost, and the encapsulated new M-D DHT algorithm
  • Keywords
    Hartley transforms; VLSI; computational complexity; digital arithmetic; digital signal processing chips; parallel algorithms; signal processing; systolic arrays; 1D transform; CORDIC-based array architecture; DSP chip; VLSI implementation; computational complexity; coordinate rotation digital computer; multidimensional DHT; multidimensional discrete Hartley transform; postprocessing; systolic computing style; triangular functions; Algorithm design and analysis; Computational complexity; Computer architecture; DH-HEMTs; Discrete Fourier transforms; Discrete transforms; Hardware; Kernel; Multidimensional systems; Signal processing algorithms;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/82.386175
  • Filename
    386175