DocumentCode
781531
Title
ARCHGEN: Automated synthesis of analog systems
Author
Antao, Brian A A ; Brodersen, Arthur J.
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Volume
3
Issue
2
fYear
1995
fDate
6/1/1995 12:00:00 AM
Firstpage
231
Lastpage
244
Abstract
High-level design of analog systems is an open area that needs to be addressed with the emerging trend of integrating mixed analog-digital systems. Design methods compatible across the analog-digital boundaries would expedite the design process, and in this paper we address analog high-level design issues. An approach for systems-level synthesis of a class of analog systems is presented. A behavioral level for the analog domain is characterized in terms of state equations and transfer functions in the continuous and discrete domains. State-space representations are generated from transfer function specifications that exhibit system level characteristics such as controllability and observability as, well as decoupled and parallel architectures. These state-space representations are synthesized into behavioral-level, technology-independent architectures composed of analog functional components. An intermediate architecture in a circuit implementation technology is synthesized from the behavioral architecture. The various algorithmic procedures for synthesis are implemented in the program ARCHGEN. Behavioral simulation is used for architecture verification and design space exploration.<>
Keywords
VLSI; analogue integrated circuits; circuit CAD; controllability; high level synthesis; observability; state-space methods; transfer functions; ARCHGEN; CAD; VLSI design; analog IC design; analog high-level design; architecture verification; automated synthesis; behavioral simulation; behavioral-level architectures; controllability; design space exploration; observability; state equations; state-space representations; technology-independent architectures; transfer function specifications; Analog-digital conversion; Character generation; Circuit synthesis; Control system synthesis; Controllability; Design methodology; Equations; Process design; Space technology; Transfer functions;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.386223
Filename
386223
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