• DocumentCode
    781771
  • Title

    Using formal specifications for functional validation of hardware designs

  • Author

    Shimizu, Kanna ; Dill, David L.

  • Author_Institution
    Stanford Univ., CA, USA
  • Volume
    19
  • Issue
    4
  • fYear
    2002
  • Firstpage
    96
  • Lastpage
    106
  • Abstract
    Formal specifications can help resolve both ambiguity issues and correctness problems in verifying complex hardware designs. This new methodology shows how specifications can also help design productivity by automating many procedures that are now done manually. Input sequences, output assertions, and a simulation coverage metric for the design under verification are all generated directly from the specification
  • Keywords
    formal specification; formal verification; virtual machines; automation; design productivity; formal specifications; functional validation; hardware designs; input sequences; output assertions; simulation coverage metric; Boolean functions; Computational modeling; Costs; Data structures; Formal specifications; Formal verification; Hardware; Productivity; Protocols; Testing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2002.1018138
  • Filename
    1018138
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=781771