• DocumentCode
    782158
  • Title

    Embedded deterministic test for low-cost manufacturing

  • Author

    Rajski, Janusz ; Kassab, Mark ; Mukherjee, Nilanjan ; Tamarapalli, Nagesh ; Tyszer, Jerzy ; Qian, Jun

  • Volume
    20
  • Issue
    5
  • fYear
    2003
  • Firstpage
    58
  • Lastpage
    66
  • Abstract
    You have probably heard that BIST takes too long and its fault coverage is low, and that deterministic test requires too many patterns. This article shows how on-chip compression and decompression techniques provide high fault coverage with low test times.
  • Keywords
    automatic test pattern generation; data compression; logic testing; ATPG; BIST; decompression; embedded deterministic test; fault coverage; low-cost manufacturing; on-chip compression; test times; Automatic test pattern generation; Built-in self-test; Costs; Design for testability; Logic design; Logic testing; Manufacturing; Phase shifters; System testing; Test pattern generators;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2003.1232257
  • Filename
    1232257
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=782158