Title :
Scheme for distributing high-speed clock signals in a large digital system
Author_Institution :
California Inst. of Technol., Big Pine, CA, USA
Abstract :
The details of a clock distribution circuit for a large digital system operating at 250 MHz are presented. The arrangement provides pulse compression control and preserves the clock timing at the 100 ps level even when parts of the circuit are replaced.
Keywords :
clocks; digital systems; 100 ps; 250 MHz; clock distribution circuit; clock timing; high-speed clock signals; large digital system; pulse compression control;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19890068