Title :
A single-chip 9-32 mb/s read/write channel for disk-drive applications
Author :
Zuffada, Maurizio ; Alini, Roberto ; Colletti, Paolo ; Demicheli, Marco ; Gregori, Marco ; Moloney, David ; Portaluri, Salvatore ; Sacchi, Fabrizio ; Arf, Sadik O. ; Condito, Vincent ; Castello, Rinaldo
Author_Institution :
SGS-Thomson Microelectron., Agrate Brianza, Italy
fDate :
6/1/1995 12:00:00 AM
Abstract :
This paper reports on a single-chip read/write channel for disk drive. The integrated circuit implements a peak detector architecture fully compatible with zoned-bit recording applications. The chip contains all the functions needed to implement a high performance read channel, i.e., pulse detector, programmable active filter, servo demodulator, frequency synthesizer, data separator and RLL(1,7) ENDEC. The design has been done in a way that takes full advantage of the features available in a BiCMOS technology to achieve power saving, high speed and immunity to cross-talk from digital to analog. The IC is fabricated in a 1.2 μ BiCMOS technology and has an active area of approximately 28 mm2. While operating from a single 5 V supply the power consumption is only 450 mW at 32 Mb/s
Keywords :
BiCMOS integrated circuits; active filters; codecs; demodulators; frequency synthesizers; hard discs; mixed analogue-digital integrated circuits; peak detectors; pulse circuits; servomechanisms; 1.2 micron; 450 mW; 5 V; 9 to 32 Mbit/s; BiCMOS technology; RLL(1,7) ENDEC; active area; data separator; disk-drive applications; frequency synthesizer; peak detector architecture; power consumption; programmable active filter; pulse detector; servo demodulator; single-chip read/write channel; zoned-bit recording applications; Active filters; Application specific integrated circuits; BiCMOS integrated circuits; Demodulation; Detectors; Disk drives; Disk recording; Frequency synthesizers; Particle separators; Servomechanisms;
Journal_Title :
Solid-State Circuits, IEEE Journal of
