Title :
A technique for nonlinearity self-calibration of DLLs
Author :
Baronti, Federico ; Fanucci, Luca ; Lunardini, Diego ; Roncella, Roberto ; Saletti, Roberto
Author_Institution :
Dipt. di Ingegneria dell´´Informazione, Univ. of Pisa, Italy
Abstract :
The on-chip nonlinearity self-calibration of a CMOS all-digital shunt-capacitor-based delay-locked delay-line is achieved by first measuring the nonlinearity of each delay-cell by means of a statistical test, and then individually correcting the cell delay mismatch according to the test results. An iterative calibration algorithm has been developed and a fully-digital circuit efficiently implementing the calibration procedure has been designed. Simulation results show the feasibility of the technique and a significant reduction of the delay-line maximum nonlinearity down to values that can be below 1%.
Keywords :
CMOS digital integrated circuits; calibration; delay lines; delay lock loops; integrated circuit testing; iterative methods; CMOS all-digital shunt-capacitor delay-locked loop delay line; cell delay mismatch; differential nonlinearity self-calibration; iterative calibration algorithm; statistical test; Algorithm design and analysis; Associate members; Automatic testing; Calibration; Circuit testing; Clocks; Delay effects; Integrated circuit measurements; Iterative algorithms; Time measurement;
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
DOI :
10.1109/TIM.2003.816814
