DocumentCode :
784309
Title :
A new approach to modeling the substrate current of pre-stressed and post-stressed MOSFET´s
Author :
Yang, Jiuun-Jer ; Chung, Steve Shao-Shiun ; Chou, Peng-Cheng ; Chen, Chia-Hsiang ; Lin, Mou-Shiung
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
42
Issue :
6
fYear :
1995
fDate :
6/1/1995 12:00:00 AM
Firstpage :
1113
Lastpage :
1119
Abstract :
In this paper, we propose a closed form expression of a new and accurate analytical substrate current model for both pre-stressed and post-stressed MOSFET´s. It was derived based on the concept of effective electric field, which gives a more reasonable impact ionization rate in the lucky-electron model. This effective electric field, composed by two experimentally determined parameters, can be regarded as a result of nonlocal heating effects within devices. This model shows a significant improvement to the conventional local field model. One salient feature of the present model is that it allows us to characterize the time evolution of the substrate current of stressed MOSFET´s for the first time. Experimental verification for a wide variety of MOSFET´s with effective channel lengths down to 0.3 μm shows that the new model is very accurate and is feasible for any kind of MOS device with different drain structures. The present model can be applied to explore the hot carrier effect in designing submicrometer MOS devices with emphasis on the design optimization of a device drain engineering issue. In addition, the present model is well suited for device reliability analysis and circuit level simulations
Keywords :
MOSFET; electric current; hot carriers; impact ionisation; semiconductor device models; semiconductor device reliability; 0.3 micron; circuit level simulations; design optimization; device drain engineering; device reliability analysis; effective channel lengths; effective electric field; hot carrier effect; hot carrier induced current; impact ionization rate; lucky-electron model; post-stressed MOSFET; prestressed MOSFET; submicron MOS devices; substrate current model; Analytical models; Circuit analysis; Circuit simulation; Design engineering; Design optimization; Hot carrier effects; Impact ionization; MOS devices; Reliability engineering; Resistance heating;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.387245
Filename :
387245
Link To Document :
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