Title :
A monolithic Hough transform processor based on restructurable VLSI
Author :
Rhodes, F.M. ; Dituri, J.J. ; Chapman, Glenn H. ; Emerson, Bruce E. ; Soares, Antonio M. ; Raffel, Jack I.
Author_Institution :
MIT Lincoln Lab., Lexington, MA, USA
fDate :
1/1/1988 12:00:00 AM
Abstract :
The implementation of a Hough transform processor using a wafer-scale-integration technology, restructurable VLSI circuit is described. The Hough transform is typically used as a grouping operation in an image processing sequence. The transform discussed here groups pixels in order to extract linear features. This calculation is realized with a wafer-scale processor that allows a complete line extraction system to be integrated on a single PC board. Also discussed is the use of the CAD tools that allowed this processor to be realized without incurring silicon layout and processing overhead
Keywords :
VLSI; circuit CAD; computerised pattern recognition; digital arithmetic; microprocessor chips; monolithic integrated circuits; transforms; CAD tools; PC board; PCB; WSI technology; image processing; linear feature extraction; monolithic Hough transform processor; pixel grouping; restructurable VLSI; wafer-scale-integration technology; Feature extraction; Image processing; Integrated circuit interconnections; Logic design; Manufacturing; Optical device fabrication; Silicon; Switches; Very large scale integration; Wafer scale integration;
Journal_Title :
Pattern Analysis and Machine Intelligence, IEEE Transactions on
