Efficient Communication Between the Embedded Processor and the Reconfigurable Logic on an FPGA

Increasing device densities have prompted FPGA manufacturers, such as Xilinx and Altera, to incorporate larger embedded components, including multipliers, DSP blocks and even embedded processors. One of the recent architectural enhancements in the Xilinx Virtex family architecture is the introduction of the PowerPC405 hard-core embedded processor. In this paper we present a software defined radio application that serves as a vehicle for investigating effective communication between the PowerPC405 processor and the surrounding FPGA fabric.