Impact of programming charge distribution on threshold voltage and subthreshold slope of NROM memory cells

Author

Larcher, Luca ; Verzellesi, Giovanni ; Pavan, Paolo ; Lusky, E. ; Bloom, Ilan ; Eitan, Boaz

Author_Institution

Dipt., di Sci. e Metodi dell´´Ingegneria, Modena Univ., Italy

Volume

49

Issue

11

fYear

2002

fDate

11/1/2002 12:00:00 AM

Firstpage

1939

Lastpage

1946

Abstract

The aim of this paper is to achieve a correct description of the programming charge distribution in NROM memory devices. This is essential to prove device functionality and to extrapolate scaling limits of devices. For this purpose we employ an inverse modeling based methodology using measurements easily performed, such as subthreshold characteristics and threshold voltage measurements. We show a simple model of programming charge distribution that can be easily implemented in two-dimensional (2-D) TCAD simulations. Results show good agreement between measured and simulated currents under different bias conditions and for different programming levels.

Keywords

CMOS memory circuits; PLD programming; electric charge; flash memories; semiconductor device models; 2D TCAD simulations; NROM memory; bias conditions; device functionality; device reliability; device scaling limits extrapolation; drift-diffusion simulations; flash memory cell; inverse modeling based methodology; model; nitride charge density; programming charge distribution; programming levels; semiconductor memories; subthreshold characteristics; threshold voltage measurements; Current measurement; Dielectric measurements; Electron traps; Flash memory; Inverse problems; Performance evaluation; Silicon; Threshold voltage; Two dimensional displays; Voltage measurement;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2002.804726

Filename

1097910