• DocumentCode
    787446
  • Title

    Closed-form breakdown voltage model for PD SOI NMOS devices considering impact ionization of both parasitic BJT and surface MOS channel simultaneously

  • Author

    Lin, Shih-Chia ; Kuo, James B.

  • Author_Institution
    Dept. of Electr. Comput. Eng., Waterloo Univ., Ont., Canada
  • Volume
    49
  • Issue
    11
  • fYear
    2002
  • fDate
    11/1/2002 12:00:00 AM
  • Firstpage
    2016
  • Lastpage
    2023
  • Abstract
    This paper reports a compact breakdown voltage model for partially depleted (PD) silicon-on-insulator (SOI) n-metal-oxide-semiconductor (NMOS) devices considering BJT/MOS impact ionization. Via the improved current conduction model considering BJT/MOS impact ionization this compact model provides an accurate prediction of the breakdown behavior of the PD SOI NMOS devices as verified by the experimental data and the MEDICI results. Based on the analytical model, when the gate voltage is lowered, the breakdown voltage decreases due to a stronger function of the parasitic BJT. In the subthreshold region, the breakdown voltage increases at a decreased gate voltage due to a weaker function of the parasitic BJT.
  • Keywords
    MOSFET; impact ionisation; semiconductor device breakdown; semiconductor device models; semiconductor device reliability; silicon-on-insulator; MEDICI; PD SOI NMOS devices; Si; closed-form breakdown voltage model; current conduction model; gate voltage; impact ionization; parasitic BJT; partially depleted devices; subthreshold region; surface MOS channel; Analytical models; Breakdown voltage; Electric breakdown; Impact ionization; MOS devices; Predictive models; SPICE; Semiconductor device modeling; Silicon on insulator technology; Thin film devices;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2002.804728
  • Filename
    1097920