DocumentCode :
787582
Title :
Impact of technology scaling on CMOS logic styles
Author :
Anis, Mohab ; Allam, Mohamed ; Elmasry, Mohamed
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume :
49
Issue :
8
fYear :
2002
fDate :
8/1/2002 12:00:00 AM
Firstpage :
577
Lastpage :
588
Abstract :
In this paper, the main challenges of technology scaling are reviewed in depth. Five popular logic families namely; conventional CMOS, complementary pass logic, Domino, differential cascode voltage switch logic, and current mode logic are presented, highlighting their advantages and drawbacks. The behavior of each logic style in deep submicrometer technologies is analyzed and predicted for future technology generations. To verify the qualitative analysis, simulations were performed on the basic logic gates, full adder and a 16-bit carry look ahead adder. The circuits were implemented in 0.8-, 0.6-, 0.35-, and 0.25-μm CMOS technologies, and optimized for minimum energy-delay product.
Keywords :
CMOS logic circuits; adders; current-mode logic; integrated circuit technology; logic gates; 0.25 micron; 0.35 micron; 0.6 micron; 0.8 micron; 16 bit; CMOS logic circuit; carry look ahead adder; complementary pass logic; current mode logic; deep submicron technology; differential cascode voltage switch logic; digital integrated circuit; domino logic; energy-delay product; full adder; logic gate; technology scaling; Adders; Analytical models; CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Integrated circuit technology; Logic gates; MOS devices; Switches; Voltage;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/TCSII.2002.805631
Filename :
1097934
Link To Document :
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