A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors

Author

Uemura, Tetsuya ; Baba, Toshio

Author_Institution

Dept. of Electron. & Inf. Eng., Hokkaido Univ., Japan

Volume

49

Issue

8

fYear

2002

fDate

8/1/2002 12:00:00 AM

Firstpage

1336

Lastpage

1340

Abstract

A three-valued D-flip-flop (D-FF) circuit and a two-stage shift register built from InGaAs-based multiple-junction surface tunnel transistors (MJSTT) and Si-based metal-oxide-semiconductor field effect transistors (MOSFET) have been demonstrated. Due to the combination of the MJSTTs latching function and the MOSFETs switching function, the number of devices required for the D-FF circuit was greatly reduced to three from the thirty required for the FET-only circuit.

Keywords

flip-flops; gallium arsenide; indium compounds; integrated logic circuits; multivalued logic circuits; negative resistance devices; sequential circuits; shift registers; silicon; ternary logic; tunnel transistors; 5 GHz; InGaAs; InGaAs-based tunnel transistors; InP; MVL operation; Si; Si-based MOSFETs; latching function; multiple NDR characteristics; multiple-junction surface tunnel transistors; multiple-valued logic; switching function; three-valued D-flip-flop; two-stage shift register; Chemicals; FETs; Indium gallium arsenide; Indium phosphide; Logic devices; MOSFET circuits; Molecular beam epitaxial growth; Resonant tunneling devices; Shift registers; Substrates;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2002.801431

Filename

1019917