A 0.5-8.5 GHz fully differential CMOS distributed amplifier

A fully integrated fully differential distributed amplifier with 5.5 dB pass-band gain and 8.5 GHz unity-gain bandwidth is described. The fully differential CMOS circuit topology yields wider bandwidth than its single-ended counterpart, by eliminating the source degeneration effects of parasitic interconnect, bond wire, and package inductors. A simulated annealing CAD tool underpins the parasitic-aware methodology used to optimize the design including all on-chip active and passive device and off-chip package parasitics. Mixed-mode S-parameter measurement techniques used for fully differential circuit testing are reviewed. Integrated in 1.3×2.2 mm² in a standard 0.6 μm CMOS process, the distributed amplifier dissipates 216 mW from a single 3 V supply.