DocumentCode :
790320
Title :
GNSS receiver for GLONASS signal reception
Author :
Kovar, P. ; Vejrazka, F. ; Seidl, L. ; Kacmarik, P.
Author_Institution :
Dept. of Radio Eng., Czech Tech. Univ., Praha, Czech Republic
Volume :
20
Issue :
12
fYear :
2005
Firstpage :
21
Lastpage :
23
Abstract :
This paper deals with the latest version of Experimental GNSS receiver built at the Czech Technical University and describes integration of GLONASS signal processing to the receiver. The new FPGA platform Virtex-D Pro by Xilinx is used and enables integration of whole digital signal processing of GNSS receiver into the single chip. The RE unit of the receiver is capable of processing all GLONASS frequency of the Li and L2 bands in two independent RE channels; each channel can process one band. The frequency selection of the appropriate satellite is accomplished in a digital correlator. The development flow of the GLONASS correlator is discussed herein. The complexity of the GLONASS correlator with complexity of GPS correlator is compared. The developed GLONASS correlator was tested in Simuelink tool during development. The next test was carried out using GLONASS simulator and real GLONASS satellite signal.
Keywords :
digital signal processing chips; field programmable gate arrays; radio receivers; radio reception; satellite navigation; FPGA; GLONASS; GNSS receiver; RE channel; Simuelink tool; Virtex-D Pro; Xilinx; digital signal processing; satellite signal; signal reception; single chip; Correlators; Digital signal processing chips; Field programmable gate arrays; Global Positioning System; Radio frequency; Receivers; Satellite broadcasting; Satellite navigation systems; Signal processing; Testing;
fLanguage :
English
Journal_Title :
Aerospace and Electronic Systems Magazine, IEEE
Publisher :
ieee
ISSN :
0885-8985
Type :
jour
DOI :
10.1109/MAES.2005.1576099
Filename :
1576099
Link To Document :
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