DocumentCode :
79145
Title :
Advanced Low-Voltage Power MOSFET Technology for Power Supply in Package Applications
Author :
Boyi Yang ; Jun Wang ; Shuming Xu ; Korec, Jacek ; Shen, Z. John
Author_Institution :
Texas Instrum., Inc., Bethlehem, PA, USA
Volume :
28
Issue :
9
fYear :
2013
fDate :
Sept. 2013
Firstpage :
4202
Lastpage :
4215
Abstract :
In this paper, a high-current dc-dc power supply in package is reported with an emphasis on the design aspects of the low- and high-side power MOSFETs embedded in the power module. A new NexFET structure with its source electrode on the bottom side of the die (source down) is designed to enable an innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint. A gate voltage pulldown circuitry monolithically integrated in the low-side NexFET is introduced to effectively prevent shoot-through faults even when a very low gate threshold voltage is used to reduce conduction and body diode reverse-recovery-related power losses. In addition, an asymmetric gate resistor circuitry is monolithically integrated in the high-side NexFET to minimize voltage ringing at the switch node. With all these novel device technology improvements, the new power supply in package module delivers a significant improvement in efficiency and offers an excellent solution for future high-frequency, high-current-density dc-dc converters.
Keywords :
DC-DC power convertors; power MOSFET; power supply circuits; asymmetric gate resistor circuitry; body diode reverse recovery related power loss; gate voltage pulldown circuitry; high current dc-dc power supply; high current density dc-dc converters; high side NexFET structure; high side power MOSFET; innovative stacked die PSiP technology; low gate threshold voltage; low voltage power MOSFET technology; package application; package footprint; package module; power module; reduced parasitic inductance; shoot through faults; source electrode; Electrodes; Inductance; Logic gates; Low voltage; Power MOSFET; Power supplies; Asymmetric gate resistor; gate voltage pull-down circuit; integration; low-voltage power MOSFET; power loss; source-down structure power MOSFET; stacked-die package; synchronous buck converters;
fLanguage :
English
Journal_Title :
Power Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2012.2230407
Filename :
6363615
Link To Document :
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