DocumentCode :
791565
Title :
An energy-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms
Author :
Chen, Kuan-Hung ; Guo, Jiun-In ; Wang, Jinn-Shyan ; Yeh, Ching-Wei ; Chen, Jia-Wei
Author_Institution :
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chia-Yi, Taiwan
Volume :
15
Issue :
5
fYear :
2005
fDate :
5/1/2005 12:00:00 AM
Firstpage :
704
Lastpage :
715
Abstract :
This paper proposes a flexible hardware solution and the associated energy-aware IP core design for computing the variable-length discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) required in the MPEG4 shape-adaptive DCT/IDCT (SA-DCT/IDCT). The proposed IP core has been developed based on the design concept of programmable processors to provide the flexibility in dynamically configuring the hardware. To achieve good performance both in area and speed, we optimize the proposed IP core both in the algorithmic computational complexity and hardware complexity. Furthermore, the proposed IP core possesses the feature of energy-aware design flexibility. The simulation shows that the proposed design has 44% energy reduction at the price of 0.3-dB signal quality degradation for the image compression applications. The implementation results show that the proposed IP core costs about 3100 gates along with 16 words (1 word = 16 bits) of memory, which can achieve the real-time processing of the texture coding in MPEG4 SP@L3 and ACE@L2 CODEC system for the CIF format video at 30 frames/s with 4:2:0 color format.
Keywords :
computational complexity; discrete cosine transforms; distributed arithmetic; integrated circuit design; optimisation; system-on-chip; video codecs; video coding; MPEG4 shape-adaptive transform; computational complexity; discrete cosine transform; distributed arithmetic; energy-aware IP core design; inverse discrete cosine transform; object-based video coding; optimization; subexpression sharing; system-on-a-chip design; variable-length DCT-IDCT; Computational complexity; Computational modeling; Costs; Degradation; Discrete cosine transforms; Discrete transforms; Hardware; Image coding; MPEG 4 Standard; Signal design; Common subexpression sharing; MPEG4 object-based video coding; SIP design; distributed arithmetic; shape-adaptive discrete cosine transform; system-on-a-chip (SoC) design;
fLanguage :
English
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8215
Type :
jour
DOI :
10.1109/TCSVT.2005.846441
Filename :
1425534
Link To Document :
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