Effects of localized contamination with copper in MOSFETs

Author

Youn-Jang Kim ; Kyeong-Keun Choi ; Ohyun Kim

Author_Institution

Electr. & Comput. Eng. Div., Pohang Univ. of Sci. & Technol., Kyungbuk, South Korea

Volume

23

Issue

8

fYear

2002

Firstpage

479

Lastpage

481

Abstract

Using a relatively large size MOSFET (W/L= 15/15 μm), we investigated the degradation of MOSFET characteristics due to localized copper contamination. In order to contaminate a part of the active region of MOSFET, silicon nitride (Si₃N₄) over the active region, which is known to be a protective film against copper, was etched by reactive ion etching (RIE). As the area of localized copper contamination is about 3-4 μm or above, apart from the edge of the gate electrode, no degradation was observed after thermal treatment at 450/spl deg/C for 2 h in N₂ ambient, based on the result of the increase in interface trap density (/spl Delta/D/sub it/).

Keywords

CMOS integrated circuits; MOSFET; ULSI; annealing; chemical interdiffusion; copper; integrated circuit interconnections; interface states; secondary ion mass spectra; sputter etching; 2 h; 450 C; Cu; NMOSFET; SIMS depth profile; Si/sub 3/N/sub 4/; active region; characteristics degradation; charge pumping current; copper diffusion; damascene interconnects; gate electrode; interface trap density; localized copper contamination; reactive ion etching; relatively large size MOSFET; selective copper deposition; thermal treatment; Contamination; Copper; Electrodes; Electromigration; Etching; Integrated circuit interconnections; MOSFETs; Protection; Semiconductor films; Silicon;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2002.801332

Filename

1021099