• DocumentCode
    792813
  • Title

    Simulation of a Ge-Si hetero-nanocrystal memory

  • Author

    Zhao, Dengtao ; Zhu, Yan ; Li, Ruigang ; Liu, Jianlin

  • Author_Institution
    Dept. of Electr. Eng., Univ. of California, Riverside, CA, USA
  • Volume
    5
  • Issue
    1
  • fYear
    2006
  • Firstpage
    37
  • Lastpage
    41
  • Abstract
    The Ge/Si hetero-nanocrystal as a floating gate has been discussed and improved. The charge stored in the quantum well formed by SiO2-Ge-Si has to be thermally activated to the valence band of the Si nanocrystal before it can leak to the substrate which significantly reduces the leakage current from the charge storage node (nanocrystal) to the substrate. The simulation shows that the flash memory with Ge-Si (3 nm/3 nm) hetero-nanocrystal floating gates possesses a retention time of about ten years with a tunneling oxide of only 2 nm. Both writing and erasing speeds are fast in the Ge-Si hetero-nanocrystal memories, which is similar to that in the memory based on Si nanocrystals only.
  • Keywords
    CMOS integrated circuits; Ge-Si alloys; MOS memory circuits; flash memories; leakage currents; nanoelectronics; nanostructured materials; quantum gates; quantum wells; silicon compounds; CMOS integrated circuits; Ge-Si heteronanocrystal memory device; MOS memories; SiO2-Ge-Si; charge stored; erasing speeds; flash memory; floating gate; leakage current; quantum well; retention time; thermally activated; tunneling oxide; valence band; writing speeds; Charge carrier processes; Flash memory; Hetero-nanocrystal memory; Leakage current; Nanocrystals; Nonvolatile memory; Tunneling; Very large scale integration; Voltage; Writing; Erasing; hetero-nanocrystal memory; programming; retention;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2005.861405
  • Filename
    1576735