Title :
A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-μm CMOS process
Author :
Wong, Joseph M C ; Cheung, Vincent S L ; Luong, Howard C.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Abstract :
A 1-V low-power high-speed dynamic-loading frequency divider is proposed using novel D flip-flops with a common-gate topology and with a single clock phase. A simple and accurate small-signal analysis model is provided to estimate the operating frequencies of the divider. Implemented in a standard digital 0.35-μm CMOS process and at 1-V supply, the proposed frequency divider measures a maximum operating frequency up to 5.2 GHz with a power consumption of 2.5 mW.
Keywords :
CMOS integrated circuits; flip-flops; frequency dividers; high-speed integrated circuits; low-power electronics; 0.35 micron; 1 V; 2.5 mW; 5.2 GHz; CMOS process; D-flip-flop; low-power high-speed dynamic-loading frequency divider; small-signal analysis model; CMOS process; Clocks; Flip-flops; Frequency conversion; Frequency estimation; Frequency measurement; Measurement standards; Power measurement; Semiconductor device modeling; Topology;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.817261
