Abstract :
A turbo-decoding message-passing (TDMP) algorithm for sparse parity-check matrix (SPCM) codes such as low-density parity-check, repeat-accumulate, and turbo-like codes is presented. The main advantages of the proposed algorithm over the standard decoding algorithm are 1) its faster convergence speed by a factor of two in terms of decoding iterations, 2) improvement in coding gain by an order of magnitude at high signal-to-noise ratio (SNR), 3) reduced memory requirements, and 4) reduced decoder complexity. In addition, an efficient algorithm for message computation using simple "max" operations is also presented. Analysis using EXIT charts shows that the TDMP algorithm offers a better performance-complexity tradeoff when the number of decoding iterations is small, which is attractive for high-speed applications. A parallel version of the TDMP algorithm in conjunction with architecture-aware (AA) SPCM codes, which have embedded structure that enables efficient high-throughput decoder implementation, are presented. Design examples of AA-SPCM codes based on graphs with large girth demonstrate that AA-SPCM codes have very good error-correcting capability using the TDMP algorithm
Keywords :
error correction codes; iterative decoding; matrix algebra; message passing; parity check codes; turbo codes; EXIT charts; decoding algorithm; decoding iterations; error-correcting capability; low-density parity-check; repeat-accumulate codes; signal-to-noise ratio; sparse parity-check matrix codes; turbo-decoding message-passing algorithm; Algorithm design and analysis; Code standards; Digital video broadcasting; Iterative decoding; Maximum likelihood decoding; Parity check codes; Sparse matrices; Throughput; Turbo codes; Very large scale integration; Iterative decoding; Ramanujan graphs; low-density parity-check (LDPC) codes; repeat-accumulate (RA) codes; turbo decoding algorithm; very large scale integration (VLSI) decoder architectures;
