Title :
Effects of substrate design on underfill voiding using the low cost, high throughput flip chip assembly process and no-flow underfill materials
Author :
Milner, David ; Paydenkar, Chetan ; Baldwin, Daniel F.
Author_Institution :
George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
4/1/2002 12:00:00 AM
Abstract :
The formation of underfill voids is an area of concern in the low cost, high throughput, or "no-flow" flip chip assembly process. This assembly process involves placement of a flip chip device directly onto the substrate pad site covered with pre-dispensed no-flow underfill. The forced motion of chip placement causes a convex flow front to pass over pad and solder mask-opening features promoting void capture. This paper determines the effects of substrate design on the phenomena of underfill voiding using the no-flow process. A full-factorial design experiment analyzes several empirically determined factors that can affect void capture in no-flow processing. The substrate design parameters included pad height, solder mask opening height, pad/solder mask opening separation, and pad pitch. The process parameters include chip placement velocity and underfill viscosity. The process robustness is measured in terms of the number of voids created during chip placement, and is further analyzed for the location and any visible modes of void formation. The goal of the work is to determine improved substrate designs to minimize voiding in flip chip processing using no flow underfills.
Keywords :
chip-on-board packaging; flip-chip devices; reflow soldering; voids (solid); chip placement; chip placement velocity; convex flow front; forced motion; high throughput flip chip assembly; no-flow underfill materials; packaging; pad height; pad pitch; pad/solder opening separation; shear thinning; solder mask-opening; substrate design effects; underfill viscosity; underfill voiding; Assembly; Costs; Electronics packaging; Flip chip; Process design; Robustness; Semiconductor device measurement; Testing; Throughput; Viscosity;
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
DOI :
10.1109/TEPM.2002.1021635