DocumentCode :
794473
Title :
An evolution to crossbar switches with virtual output queuing and buffered cross points
Author :
Yoshigoe, Kenji ; Christensen, Kenneth J.
Author_Institution :
Univ. of South Florida, FL, USA
Volume :
17
Issue :
5
fYear :
2003
Firstpage :
48
Lastpage :
56
Abstract :
Input queued (IQ) switch architectures with virtual output queues (VOQ) scale up to very high speeds and have been a subject of intense research in the past decade. VOQ IQ switches require switch matrix scheduling algorithms to match input ports to out ports. In this tutorial article, we present an overview of switch matrix scheduling for VOQ IQ switches with crossbar switch fabrics. We then describe what we believe will be the next generation of high-speed crossbar switches: the evolution of IQ switches to combined input and crossbar queued (CICQ) switches. With the continued increase in density of VLSI, sufficient buffering at crossbar cross points for one cell or packet has become feasible to implement. We show how CICQ switches have simple schedulers and result in lower delay than IQ switches. Both IQ and CICQ switches have unstable regions. We show how a threshold and bursting technique can feasibly achieve stability. We also show how CICQ switches are better suited (than IQ switches) for switching of variable-length packets such as IP packets. Many challenges remain in IQ and CICQ switches. In particular, the inclusion of QoS scheduling methods that are currently only suitable for output queued switches is a major open problem.
Keywords :
Internet; buffer storage; packet switching; quality of service; queueing theory; scheduling; virtual storage; CICQ switches; IP packets; IQ switches; Internet; QoS scheduling; VOQ; buffered cross points; buffering; bursting technique; combined input and crossbar queued switches; delay; high-speed crossbar switches; input queued switch architectures; schedulers; stability; switch matrix scheduling algorithms; threshold; variable-length packets; virtual output queuing; Delay; Fabrics; Impedance matching; Packet switching; Scheduling algorithm; Stability; Switches; Throughput; Very large scale integration;
fLanguage :
English
Journal_Title :
Network, IEEE
Publisher :
ieee
ISSN :
0890-8044
Type :
jour
DOI :
10.1109/MNET.2003.1233917
Filename :
1233917
Link To Document :
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