Title :
11 GHz CMOS /spl Sigma//spl Delta/ frequency synthesiser
Author :
Solomko, V.A. ; Weger, P.
Author_Institution :
Chair of Circuit Design, Brandenburg Univ. of Technol., Cottbus
Abstract :
A fully integrated 11 GHz fractional-N PLL with a three-stage MASH SigmaDelta modulator with DC dither in all stages is implemented in a standard 0.13 mum CMOS technology. The synthesiser generates no fractional spurs at frequency offsets outside the loop bandwidth and a small number of fractional spurs with the power not exceeding -44 dBc within the loop bandwidth at the carrier frequency of 11 GHz
Keywords :
CMOS integrated circuits; field effect MMIC; frequency synthesizers; phase locked loops; sigma-delta modulation; 0.13 micron; 11 GHz; CMOS frequency synthesiser; MASH SigmaDelta modulator; PLL; carrier frequency; fractional spurs; loop bandwidth;
Journal_Title :
Electronics Letters
