Title :
A dictionary-based en/decoding scheme for low-power data buses
Author :
Lv, Tiehan ; Henkel, Jörg ; Lekatsas, Haris ; Wolf, Wayne
Author_Institution :
Electr. Eng. Dept., Princeton Univ., NJ, USA
Abstract :
As bus lengths on multihundred-million transistor systems-on-a-chip (SoC) grow, and as interwire capacitances of sub-0.10 /spl mu/m technologies advance, the resulting high-switching capacitances of buses (and interconnects in general) have a nonnegligible impact on the power consumption of a whole SoC. This trend has been recognized and recently addressed by various research groups. We address this problem by introducing our bus encoding technique, adaptive dictionary-encoding scheme "ADES" that minimizes the power consumption of data buses through a dictionary-based encoding technique. Based on exploration of data properties on buses, our technique saves on average more than 25% of bus energy compared to the nonencoded cases using a large set of real-world applications for both address and data buses. Furthermore, we compare our technique to the best-known data bus encoding techniques to date and we find that it exceeds all of them in terms of energy savings for the same set of applications.
Keywords :
VLSI; decoding; encoding; low-power electronics; microprocessor chips; system-on-chip; SoC; adaptive dictionary-encoding scheme; bus encoding technique; deep submicrometer design; dictionary-based encoding/decoding scheme; high-switching capacitances; interwire capacitances; low-power data buses; power consumption; systems-on-a-chip; Adders; Arithmetic; CMOS technology; Data buses; Decoding; Delay estimation; Integrated circuit interconnections; Solid state circuits; System-on-a-chip; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2003.817123