Title :
40 Gbit/s/ch 2×2 switch IC using InP HEMTs
Author :
Kamitsuna, H. ; Yamane, Y. ; Tokumitsu, M. ; Sugahara, H. ; Muraguchi, M.
Author_Institution :
NTT Photonics Labs., NTT Corp., Kanagawa, Japan
fDate :
4/28/2005 12:00:00 AM
Abstract :
A low-power 2×2 switch IC using InP HEMTs as cold FETs is presented. It has a logic-level-independent interface since no signal line is grounded. The IC yields low insertion loss of 1.5-2.7 dB and high isolation of >21.2 dB below 30 GHz. When two 40 Gbit/s signals were input, error-free operation was confirmed with virtually zero power dissipation.
Keywords :
III-V semiconductors; field effect transistor switches; high electron mobility transistors; low-power electronics; 1.5 to 2.7 dB; 40 Gbit/s; InP; InP HEMT; cold FET; error-free operation; logic-level-independent interface; low-power switch IC; power dissipation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20050261
