DocumentCode :
796074
Title :
Highly linear transconductance topology using floating transistors
Author :
Zare-Hoseini, H. ; Kale, I. ; Morling, C.S.
Volume :
42
Issue :
1
fYear :
2006
Firstpage :
42404
Abstract :
A new technique for realising highly linear transconductances is presented. The technique is based on using floating transistors in the input stage of the transconductor, which act as source-followers along with a degeneration resistor. An example realisation of the technique is given together with circuit-level simulations
Keywords :
MOSFET <highly lin. transconductance topol., floating transistors>; circuit simulation <highly lin. transconductance topol., floating transistors>; linear network analysis <highly lin. transconductance topol., floating transistors>; network topology <highly lin. transconductance topol., floating transistors>; circuit simulations; degeneration resistor; floating transistors; highly linear transconductance topology; input stage; source-followers; transconductor;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20063846
Filename :
1577585
Link To Document :
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