• DocumentCode
    796230
  • Title

    Adaptive algorithms for maximal diagnosis of wiring interconnects

  • Author

    Feng, Wen-Yi ; Meyer, Fred J. ; Lombardi, Fabrizio

  • Author_Institution
    Lattice Semicond., Bethlehem, PA, USA
  • Volume
    52
  • Issue
    10
  • fYear
    2003
  • Firstpage
    1259
  • Lastpage
    1270
  • Abstract
    We give two algorithms for maximal diagnosis of wiring networks without repair under a general fault model. Maximal diagnosis consists of identifying all diagnosable faults under the assumptions that each net can have multiple drivers and receivers and can be affected by any number of short and open faults. This process is equivalent to verifying all connections between inputs and outputs. Matrices represent the connections in fault-free and faulty networks. We present two new algorithms and discuss prior algorithms. All algorithms discussed are adaptive and have their tests divided into two phases. Our first new algorithm exploits a unique condition for verifying the connections; our second new algorithm maps the connection verification problem to a bipartite graph. All algorithms discussed use an independent test set for the first test phase. Simulation results show that the proposed algorithms outperform previous algorithms for maximal diagnosis in terms of the number of tests. The total time complexity for computing the test sequences and analyzing the output response is polynomial.
  • Keywords
    boundary scan testing; circuit analysis computing; computational complexity; fault diagnosis; printed circuit testing; adaptive algorithms; bipartite graph; connection verification problem; drivers; fault-free networks; faulty networks; general fault model; independent test set; matrices; maximal diagnosis; open faults; output response; receivers; sequences; short faults; simulation; total time complexity; wiring interconnects; wiring networks; Adaptive algorithm; Bipartite graph; Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Integrated circuit interconnections; Registers; Transmission line matrix methods; Wiring;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2003.1234524
  • Filename
    1234524