Title :
Hemispherical grained Si formation on in-situ phosphorus doped amorphous-Si electrode for 256 Mb DRAM´s capacitor
Author :
Watanabe, Hirohito ; Tatsumi, Toru ; Ohnishi, Sadayuki ; Kitajima, Hiroshi ; Honma, Ichirou ; Ikarashi, Taeko ; Ono, Haruhiko
Author_Institution :
ULSI Device Dev. Labs., NEC Corp., Kanagawa, Japan
fDate :
7/1/1995 12:00:00 AM
Abstract :
The cylindrical capacitor structure with hemispherical grained-Si (HSG-Si) described here reliably achieves a cell capacitance of 30 fF in a 0.4 μm-high storage electrode with a cell area of a 0.72 μm2 for 256 Mbit dynamic random access memory. An HSG-Si formation technology using Si2H6-molecule irradiation and annealing enables control of the grain density and grain size of HSG-Si fabricated selectively on the whole surface of phosphorus-doped amorphous Si cylindrical electrodes
Keywords :
DRAM chips; amorphous semiconductors; annealing; capacitors; electrodes; elemental semiconductors; grain growth; grain size; ion implantation; phosphorus; radiation effects; scanning electron microscopy; semiconductor-insulator-semiconductor devices; silicon; transmission electron microscopy; 0.4 mum; 256 Mbit; 30 fF; DRAM capacitor; LPCVD films; SEM micrographs; Si:P; Si2H6; Si2H6-molecule irradiation; SiO2-Si3N4-Si; TEM micrographs; amorphous-Si electrode; annealing; cell capacitance; cylindrical capacitor structure; grain density control; grain size control; hemispherical grained Si formation; high storage electrode; in-situ P doping; ion implantation; stacked capacitors; Annealing; Capacitance; Capacitors; Electrodes; Grain size; Infrared heating; Random access memory; Size control; Surface cleaning; Temperature control;
Journal_Title :
Electron Devices, IEEE Transactions on
