Effects of source/drain implants on short-channel MOSFET I-V and C-V characteristics

Author

Huang, Cheng-Liang ; Khalil, Nadim A. ; Arora, Narain D. ; Zetterlund, Bjom ; Bair, Lawrence A.

Author_Institution

Digital Equipment Corp., Hudson, MA, USA

Volume

42

Issue

7

fYear

1995

fDate

7/1/1995 12:00:00 AM

Firstpage

1255

Lastpage

1261

Abstract

The effects of source/drain implants on n-channel MOSFET I-V and C-V characteristics are measured and compared for the lightly doped drain (LDD) and the large-angle-tilt implanted drain (LATID) devices. We show that despite substantial improvement in hot-carrier reliability for LATID devices, the LATID design might have a limited range of application for short-channel MOSFETs. This is because as a result of enhanced V_TH roll-off and increased overlap capacitance for the LATID devices compared to LDD devices, the device/circuit performance degrades. The degradation of performance becomes more pronounced as device length is reduced. These results are confirmed by both experimental data and 2-dimensional numerical simulations

Keywords

MOSFET; capacitance; hot carriers; ion implantation; semiconductor device reliability; semiconductor device testing; 2D numerical simulations; C-V characteristics; I-V characteristics; LATID design; LDD devices; enhanced V_TH roll-off; hot-carrier reliability; large-angle-tilt implanted drain devices; lightly doped drain device; n-channel MOSFET; overlap capacitance; performance degradation; short-channel MOSFET; source/drain implants; CMOS process; CMOS technology; Capacitance; Capacitance-voltage characteristics; Degradation; Hot carrier effects; Hot carriers; Implants; MOSFET circuits; Numerical simulation;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.391207

Filename

391207