The “gated-diode” configuration in MOSFET´s, a sensitive tool for characterizing hot-carrier degradation

This paper describes a new measurement technique, the forward gated-diode current characterized at low drain voltages to be applied in MOSFET´s for investigating hot-carrier stress-induced defects at high spatial resolution. The generation/recombination current in the drain-to-substrate diode as a function of gate voltage, combined with two-dimensional numerical simulation, provides a sensitive tool for detecting the spatial distribution and density of interface defects. In the case of strong accumulation, additional information is obtained from interband tunneling processes occurring via interface defects. The various mechanisms for generating interface defects and fixed charges at variable stress conditions are discussed, showing that information complementary to that available from other methods is obtained