Title :
Advanced TFT SRAM cell technology using a phase-shift lithography
Author :
Yamanaka, Toshiaki ; Hashimoto, Takashi ; Hasegawa, Norio ; Tanaka, Toshihiko ; Hashimoto, Naotaka ; Shimizu, Akihiro ; Ohki, Nagatoshi ; Ishibashi, Koichiro ; Sasaki, Katsuro ; Nishida, Takashi ; Mine, Toshiyuki ; Takeda, Eiji ; Nagano, Takahiro
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fDate :
7/1/1995 12:00:00 AM
Abstract :
An advanced TFT memory cell technology has been developed for making high-density and high-speed SRAM cells. The cell is fabricated using a phase-shift lithography that enables patterns with spaces of less than 0.25 μm to be made using the conventional stepper. Cell area is also reduced by using a small cell-ratio and a parallel layout for the transistor. Despite the small cell-ratio, stable operation is assured by using advanced polysilicon PMOS TFT´s for load devices. The effect of the Si3N4 multilayer gate insulator on the on-current and the influence of the channel implantation are also investigated. To obtain stable operation and extremely low stand-by power dissipation, a self-aligned offset structure for the polysilicon PMOS TFT is proposed and demonstrated. A leakage current of only 2 fA/cell and an on-/off-current ratio of 4.6×106 are achieved with this polysilicon PMOS TFT in a memory cell, which is demonstrated in a experimental 1-Mbit CMOS SRAM chip that has an access time of only 7 ns
Keywords :
CMOS memory circuits; SRAM chips; integrated circuit layout; integrated circuit technology; leakage currents; phase shifting masks; photolithography; thin film transistors; 0.25 micron; 1 Mbit; 7 ns; CMOS SRAM chip; Si3N4; Si3N4 multilayer gate insulator; TFT SRAM cell technology; cell-ratio; channel implantation; conventional stepper; high-density SRAM cells; high-speed SRAM cells; leakage current; low stand-by power dissipation; parallel layout; phase-shift lithography; polysilicon PMOS TFT load devices; self-aligned offset structure; stable operation; Annealing; FETs; Lithography; MOS devices; Power dissipation; Random access memory; Resistors; Silicon; Space technology; Thin film transistors;
Journal_Title :
Electron Devices, IEEE Transactions on
