• DocumentCode
    79772
  • Title

    High-Performance Split-Gate Enhanced UMOSFET With p-Pillar Structure

  • Author

    Ying Wang ; Hai-Fan Hu ; Cheng-Hao Yu ; Hao Lan

  • Author_Institution
    Coll. of Inf. & Commun. Eng., Harbin Eng. Univ., Harbin, China
  • Volume
    60
  • Issue
    7
  • fYear
    2013
  • fDate
    Jul-13
  • Firstpage
    2302
  • Lastpage
    2307
  • Abstract
    In this paper, a split-gate resurf stepped oxide (RSO) vertical UMOSFET with p-pillar under the p+ plug region structure is proposed. The p-pillar could modulate the electric field of the drift region with the split-gate in 3-D and simultaneously brings electric field peaks at the sidewall junction between p-pillar and n-drift region. Thus the split-gate enhanced with p-pillar (SGEP) UMOS could increase the drift region doping concentration, reduce the on-state-specific resistance, and maintains the breakdown voltage as compared with the super junction and split-gate RSO UMOSs. Numerical simulation results show that the charge imbalance endurance of SGEP is also largely increased.
  • Keywords
    MOSFET; numerical analysis; semiconductor device models; semiconductor doping; RSO vertical UMOSFET; SGEP UMOS; breakdown voltage; charge imbalance endurance; drift region doping concentration; electric field; high-performance split-gate enhanced UMOSFET; n-drift region; numerical simulation; on-state-specific resistance; p-pillar structure; p+ plug region structure; sidewall junction; split-gate enhanced with p-pillar UMOS; split-gate resurf stepped oxide vertical UMOSFET; superjunction RSO UMOS; Breakdown voltage (BV); on-state specific resistance (RSP); split-gate; trench gate UMOSFET;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2013.2260547
  • Filename
    6521339