Title :
Improved

-Detection Test Sequences Under Transparent Scan
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN
Abstract :
The quality of test sequences for scan circuits under a test-application scheme called transparent scan as n-detection test sequences is studied. A transparent-scan sequence T is obtained from a compact single-detection combinational test set C. It is shown that for the same number of clock cycles required to apply C, the transparent-scan sequence T detects faults more times than C. It is also noted that a transparent-scan sequence based on a combinational test set contains unspecified values. The effects of specifying the unspecified values of the transparent-scan sequence on the quality of the sequence are studied by considering a random specification of these values. A procedure for modifying the scan-select subsequence of a (fully specified) transparent-scan sequence so as to improve its quality as an n-detection test sequence is also described. Finally, the extension of a transparent-scan test sequence into an n-detection test sequence that detects every target fault at least n times is considered. The results show a slower increase in test-application time with n than when combinational test sets are considered
Keywords :
automatic test pattern generation; boundary scan testing; combinational circuits; fault simulation; integrated circuit testing; random sequences; combinational test set; combinational test sets; fault detection; n-detection test sequences; random specification; scan circuits; single-detection; test generation; test sequence quality; transparent scan sequence; Circuit faults; Circuit testing; Clocks; Compaction; Design automation; Electrical fault detection; Fault detection; Logic; Microprocessors; Switches; scan design; test generation;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2006.881334