DocumentCode :
798028
Title :
Efficient Interconnect Test Patterns for Crosstalk and Static Faults
Author :
Min, Pyoungwoo ; Yi, Hyunbean ; Song, Jaehoon ; Baeg, Sanghyeon ; Park, Sungju
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Hanyang Univ., Kyunggi-Do
Volume :
25
Issue :
11
fYear :
2006
Firstpage :
2605
Lastpage :
2608
Abstract :
This paper introduces effective test patterns for system-on-chip and board interconnects. Initially, "6n" patterns are introduced to completely detect and diagnose both static and crosstalk faults, where "n" is the total number of interconnect nets. Then, more economic "4n+1" patterns are described to test the crosstalk faults for the interconnect nets separated within a certain distance
Keywords :
automatic test pattern generation; crosstalk; fault simulation; integrated circuit interconnections; integrated circuit testing; system-on-chip; board interconnects; crosstalk faults; interconnect test patterns; static faults; system-on-chip; Circuit faults; Crosstalk; Delay; Environmental economics; Fault detection; Integrated circuit interconnections; Logic testing; System testing; System-on-a-chip; Test pattern generators; Crosstalk faults; interconnect test; static faults; system-on-chip (SoC);
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2006.873899
Filename :
1715444
Link To Document :
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