DocumentCode :
798333
Title :
State minimisation-based loop handling for critical path analysis
Author :
Han, S.Y. ; Kim, Y.H.
Author_Institution :
Dept. of Electr. Eng., Pohang Inst. of Sci. & Technol., South Korea
Volume :
32
Issue :
1
fYear :
1996
fDate :
1/4/1996 12:00:00 AM
Firstpage :
8
Lastpage :
9
Abstract :
The authors present a new approach to the critical path analysis of digital circuits with feedback loops. The idea is to first convert a circuit with feedback loops to an equivalent minimum-sized acyclic circuit using a state-minimisation technique of sequential machines and then to perform critical path analysis. The results of experiments illustrate that the proposed method finds critical paths correctly and efficiently in the presence of feedback loops
Keywords :
VLSI; circuit analysis computing; circuit feedback; critical path analysis; digital circuits; digital integrated circuits; equivalent circuits; graph theory; integrated logic circuits; minimisation; sequential machines; timing; critical path analysis; digital circuits; equivalent minimum-sized acyclic circuit; feedback loops; sequential machines; state minimisation-based loop handling; state-minimisation technique;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19960021
Filename :
490694
Link To Document :
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