DocumentCode
799914
Title
An Overview of Power Analysis Attacks Against Field Programmable Gate Arrays
Author
Standaert, François-Xavier ; Peeters, Eric ; Rouvroy, Gael ; Quisquater, Jean-Jacques
Author_Institution
Lab. de Microelectronique, Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium
Volume
94
Issue
2
fYear
2006
Firstpage
383
Lastpage
394
Abstract
Since their introduction by Kocher in 1998, power analysis attacks have attracted significant attention within the cryptographic community. While early works in the field mainly threatened the security of smart cards and simple processors, several recent publications have shown the vulnerability of hardware implementations as well. In particular, field programmable gate arrays are attractive options for hardware implementation of encryption algorithms,but their security against power analysis is a serious concern, as we discuss in this paper. For this purpose, we present recent results of attacks attempted against standard encryption algorithms, provide a theoretical estimation of these attacks based on simple statistical parameters and evaluate the cost and security of different possible countermeasures.
Keywords
cryptography; field programmable gate arrays; statistical analysis; block ciphers; cryptographic community; cryptographic hardware; encryption algorithms; field programmable gate arrays; physical security; power analysis attacks; side-channel attacks; smart cards; statistical parameters; Algorithm design and analysis; Costs; Data security; Elliptic curve cryptography; Estimation theory; Field programmable gate arrays; Hardware; Information security; Information technology; Smart cards; Block ciphers; cryptographic hardware; field programmable gate array (FPGA); physical security; power analysis; side-channel attacks;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/JPROC.2005.862437
Filename
1580507
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