Title :
Direct Evaluation of Gate Line Edge Roughness Impact on Extension Profiles in Sub-50-nm n-MOSFETs
Author :
Fukutome, Hidenobu ; Momiyama, Youichi ; Kubo, Tomohiro ; Tagawa, Yukio ; Aoyama, Takayuki ; Arimoto, Hiroshi
Author_Institution :
Fujitsu Labs. Ltd, Tokyo
Abstract :
In this paper, the impact of gate line edge roughness (LER) on two-dimensional carrier profiles in sub-50-nm n-MOSFETs was directly evaluated. Using scanning tunneling microscopy (STM), it was clearly observed that the roughness of extension edges induced by gate LER strongly depended on the implanted dose, pockets, and coimplantations. Impurity diffusion suppressed by a nitrogen (N) coimplant enhanced the roughness of the extension edges, which caused fluctuations in the device performance. The expected effect based on the carrier profiles measured by STM of the N coimplant on the electrical performance of the n-MOSFETs was verified
Keywords :
MOSFET; impurity distribution; ion implantation; nanoelectronics; scanning tunnelling microscopy; surface diffusion; 50 nm; MOSFET; carrier profiles; electrical performance; extension profiles; impurity diffusion; line edge roughness; nitrogen coimplantation; scanning tunneling microscopy; Degradation; Doping profiles; Electric variables measurement; FETs; Impurities; MOSFET circuits; Microscopy; Nitrogen; Tunneling; Two dimensional displays; Line edge roughness (LER); MOSFETs; nitrogen coimplantation; two-dimensional (2-D) carrier profile;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2006.882784
