Limit Cycles in Fixed-Point Implementation of Control Algorithms

This paper addresses some of the issues concerning limit cycles due to fixed-point implementation of control algorithms. It is shown that a dc equilibrium point may not always exist, although its existence is easily guaranteed for Type-1 systems. Simple formulas are given for bounds on the amplitude (rms and absolute) of limit cycles, should they occur. These bounds can be decreased by increasing word length. A sufficient condition for the absence of limit cycles, based on the Vidal-Wegrazin (VW) criterion, is developed. Finally, it is shown that noise, acting as dither, actually improves performance by quenching limit cycles.