• DocumentCode
    800585
  • Title

    High-density CMOS interconnect realized on flexible organic substrate

  • Author

    Li, H.Y. ; Hwang, N. ; Guo, L.H. ; Zhang, Q.X. ; Teoh, K.W. ; Lo, G.Q. ; Balasubraminian, N. ; Kwong, D.-L.

  • Author_Institution
    Inst. of Microelectron., Singapore, Singapore
  • Volume
    27
  • Issue
    2
  • fYear
    2006
  • Firstpage
    102
  • Lastpage
    104
  • Abstract
    High-density interconnect integrated circuits (ICs) have been realized on flexible organic substrate with the demonstration of excellent electrical yield and well maintained reliability. Long metal-via chain structures were pre-fabricated with 0.18-μm Cu-backend technology on Si-substrate and later transferred onto the organic substrates with wafer-transfer technology. By optimizing the transfer process with thin FR-4 (4 mil /spl ap/0.1 mm), our results demonstrate that both Cu/USG and Cu/low-/spl kappa/ [Black-Diamond (BD)]-based interconnects can be reliably realized over the organic substrate. For via chain structures with via size /spl sim/0.26 μm and via number /spl sim/104, the yields were /spl ges/90% and 85% at room temperature and at 100/spl deg/C, respectively. The dielectric breakdown field of the Cu/USG transferred interconnect ICs has been characterized to be /spl ges/5 MV/cm, which is comparable with the results on Si-substrate.
  • Keywords
    CMOS integrated circuits; copper; flexible electronics; integrated circuit interconnections; integrated circuit reliability; organic semiconductors; silicon; 0.18 micron; 100 C; Cu; Cu-backend technology; Cu/USG backend interconnect; Cu/low-k backend interconnect; electrical yield; flexible organic substrate; high-density CMOS interconnect; high-density via chain; metal-via chain structure; wafer-transfer technology; Buffer layers; Integrated circuit interconnections; Integrated circuit reliability; Integrated circuit technology; Integrated circuit yield; Maintenance; Radiofrequency integrated circuits; Substrates; Temperature; Wafer bonding; Cu/USG backend interconnect; Cu/low-; high-density via chain; wafer-transfer technology;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2005.863134
  • Filename
    1580595