Title :
Trenching observed during sidewall formation in GaAs self-aligned refractory gate FETs
Author :
Baca, A.G. ; Howard, A.J. ; Shul, R.J. ; Sherwin, M.E.
Author_Institution :
Sandia Nat. Labs., Albuquerque, NM, USA
fDate :
1/4/1996 12:00:00 AM
Abstract :
GaAs removal of ~21 nm in the form of a trench has been observed as a result of sidewall etching in a W-based refractory gate sidewall process used for self-aligned GaAs FETs. This unintentional material removal is of increasing concern as the active channel of the FET becomes shallower. Virtual elimination of trenching is achieved by changing the sidewall dielectric from SiO2 to Si3N 4
Keywords :
III-V semiconductors; Schottky gate field effect transistors; dielectric thin films; gallium arsenide; sputter etching; tungsten; MESFETs; RIE; W-GaAs; active channel; self-aligned refractory gate FETs; sidewall dielectric; sidewall etching; trenching;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19960017
