DocumentCode :
802569
Title :
Test Engineering for CMOS Gate Arrays with the CAD-System VENUS 1
Author :
Scherer, Olaf
Author_Institution :
Siemans AG, Munich FRG, Germany.
Issue :
4
fYear :
1986
Firstpage :
400
Lastpage :
403
Abstract :
This paper describes the application of the computer-aided design/computer-aided testing (CAD/CAT) system VENUS 1 at Siemens for testing CMOS gate arrays [1]. The requirements for and the industrial aspects of CMOS gate array testing will be discussed.
Keywords :
Application software; Application specific integrated circuits; CMOS technology; Circuit testing; Design automation; Integrated circuit testing; Manufacturing; Standards development; System testing; Venus;
fLanguage :
English
Journal_Title :
Industrial Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0046
Type :
jour
DOI :
10.1109/TIE.1986.350907
Filename :
4158808
Link To Document :
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