Title :
1.1 V high speed, low power BiCMOS logic circuit
Author :
Seng, Yeo Kiat ; Rofail, S.S.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore
fDate :
6/22/1995 12:00:00 AM
Abstract :
A 1.1 V full switching high speed, low power BiCMOS logic circuit is presented. It consists of nine devices and uses a noncomplementary BiCMOS process. Bootstrapping and partial charge removal techniques are employed. HSPICE simulations have shown that the new circuit outperforms both CMOS and a recently reported circuit in terms of speed and power-delay product. An analytical expression relating the pull-up delay with its device parameters is also derived
Keywords :
BiCMOS logic circuits; bootstrap circuits; delays; 1.1 V; HSPICE simulations; bootstrapping; device parameters; high speed logic circuit; low power BiCMOS circuit; noncomplementary BiCMOS process; partial charge removal techniques; power-delay product; pull-up delay;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19950714
