Title :
CMOS current mode winner-take-all circuit with distributed hysteresis
Author :
DeWeerth, S.P. ; Morris, T.G.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
6/22/1995 12:00:00 AM
Abstract :
An analogue-VLSI winner-take-all circuit is enhanced through the addition of hysteretic feedback that emphasises the spatial locality of competing signals using a resistive network. This circuit has applications to tasks in areas such as image processing, in which inputs are not stationary with respect to the circuit array
Keywords :
VLSI; circuit feedback; computer vision; focal planes; hysteresis; logic circuits; real-time systems; CMOS current mode winner-take-all circuit; analogue-VLSI winner-take-all circuit; circuit array; distributed hysteresis; hysteretic feedback; image processing; resistive network; spatial locality;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19950729
