• DocumentCode
    803747
  • Title

    Analog circuit design optimization based on symbolic simulation and simulated annealing

  • Author

    Gielen, Georges G E ; Walscharts, Herman C C ; Sansen, Willy M C

  • Author_Institution
    Dept. Elektrotech., Katholieke Univ. Leuven, Heverlee, Belgium
  • Volume
    25
  • Issue
    3
  • fYear
    1990
  • fDate
    6/1/1990 12:00:00 AM
  • Firstpage
    707
  • Lastpage
    713
  • Abstract
    A methodology for the automatic design optimization of analog integrated circuits is presented. A non-fixed-topology approach is realized by combining the optimization program OPTIMAN with the symbolic simulator ISAAC. After selecting a circuit topology, the user invokes ISAAC to model the circuit. ISAAC generates both exact and simplified analytic expressions, describing the circuit´s behavior. The model is then passed to the design optimization program OPTIMAN. This program is based on a generalized formulation of the analog design problem. For the selected topology, the independent design variables are automatically extracted and OPTIMAN sizes all elements to satisfy the performance constraints, thereby optimizing a user-defined design objective. The global optimization method used on the analytic circuit models is simulated annealing. Practical examples show that OPTIMAN quickly designs analog circuits, closely meeting the specifications, and that it is a flexible and reliable design and exploration tool
  • Keywords
    analogue circuits; digital simulation; linear integrated circuits; network topology; optimisation; ISAAC; OPTIMAN; analog integrated circuits; automatic design optimization; circuit topology; global optimization; independent design variables; simulated annealing; symbolic simulation; user-defined design objective; Analog circuits; Analog integrated circuits; Analytical models; Circuit analysis; Circuit simulation; Circuit topology; Constraint optimization; Design optimization; Optimization methods; Simulated annealing;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.102664
  • Filename
    102664